|
|
|
|
|
|
|
|
All Technical Papers (by date)
Conventional Processor Architecture and Compilers, Performance Modeling
Secure, Dependable and Autonomic Computing, DRM
Embedded Computing
Low-Power Techniques
FPGA Techniques
3D ICs, SoC, Physical Design and EDA Tools
Multicore, Parallel Architecture and Systems
Support for 3D Graphics
|
Refereed Journal and Conference Papers
|
2008
|
| MICRO-41 | Vikas R. Vasisht and Hsien-Hsin S. Lee. "SHARK: Architectural Support for Autonomic Protection Against Stealth by Rootkit Exploits." To appear in Proceedings of the 41st ACM/IEEE International Symposium on Microarchitecture, Lake Como, Italy, November, 2008. |
| Computer | Dong Hyuk Woo and Hsien-Hsin S. Lee. "Extending Amdahl's Law for Energy-Efficient Computing in Many-Core Era." To appear in Computer, 2008. |
| JSA | Fayez Mohamood, Mrinmoy Ghosh, and Hsien-Hsin S. Lee. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." To appear in Journal of Systems Architecture, 2008. |
| IEEE MICRO | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A 3D-integrated Broad-Purpose Acceleration Layer." To appear in IEEE MICRO special issue on Accelerator Architectures, July/August, 2008. |
| SAMOS VIII | Chinnakrishnan S. Ballapuram and Hsien-Hsin S. Lee. "Improving TLB Energy for Java Applications on JVM." In Proceedings of the IEEE International Symposium on Systems, Architectures, Modeling and Simulation, pp.218-223, Samos, Greece, July, 2008.
[pdf] [slide] |
| GH-08 | Ahmad Sharif and Hsien-Hsin S. Lee. "Total Recall: A Debugging Framework for GPUs." In Proceedings of the ACM SIGGRAPH/Eurographics Workshop of Graphics Hardware, Sarajevo, Bosnia-Herzegovina, June, 2008.
[pdf] |
| SPAA | Richard M. Yoo and Hsien-Hsin S. Lee. "Adaptive Transaction Scheduling for Transactional Memory Systems." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.169-178, Munich, Germany, June, 2008.
[pdf] [slide] |
| SPAA | Richard M. Yoo, Yang Ni, Adam Welc, Bratin Saha, Ali-Reza Adl-Tabatabai, and Hsien-Hsin S. Lee. "Kicking the Tires of Software Transactional Memory: Why the Going Gets Tough." In Proceedings of the 20th ACM Symposium on Parallelism in Algorithms and Architectures in the Special Track on Hardware and Software Techniques to Improve the Programmability of Multicore Machines, pp.265-274, Munich, Germany, June, 2008.
[pdf] |
| ASPLOS XIII | Chinnakrishnan S. Ballapuram, Ahmad Sharif and Hsien-Hsin S. Lee. "Exploiting Access Semantics and Program Behavior to Reduce Snoop Power in Chip Multiprocessors." In Proceedings of the 13th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, pp.60-69, Seattle, WA, March, 2008.
[pdf] [slide] |
| ASP-DAC | Michael Healy, Fayez Mohamood, Hsien-Hsin S. Lee and Sung Kyu Lim. "A Unified Methodology for Power Supply Noise Reduction in Modern Microarchitecture Design." In Proceedings of the 13th IEEE/ACM Asia South Pacific Design Automation Conference, pp.611-616, Seoul, Korea, January, 2008.
[pdf] |
2007
|
| MICRO-40 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs." In Proceedings of the 40th ACM/IEEE International Symposium on Microarchitecture, pp.134-145, Chicago, IL, December, 2007.
[pdf] [slide] |
| ICPADS-07 | Eric Fontaine and Hsien-Hsin S. Lee. "Optimizing Katsevich Image Reconstruction Algorithm on Multicore Processors." In Proceedings of the 13th IEEE International Conference on Parallel and Distributed Systems, Hsinchu, Taiwan, December, 2007.
[pdf] [slide] |
| ICPADS-07 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "Virtual Exclusion: An Architectural Approach to Reducing Leakage Energy in Caches for Multiprocessor Systems." In Proceedings of the 13th IEEE International Conference on Parallel and Distributed Systems, Hsinchu, Taiwan, December, 2007.
[pdf] [slide] |
| ITC-07 | Dean L. Lewis and Hsien-Hsin S. Lee. "A Scan-Island Based Design Enabling Pre-bond Testability in Die-Stacked Microprocessors." In Proceedings of the International Test Conference, Santa Clara, CA, October, 2007.
[pdf] [slide] |
| IISWC-07 | Richard M. Yoo, Hsien-Hsin S. Lee, Han Lee and Kingsum Chow. "Hierarchical Means: Single Number Benchmarking with Workload Cluster Analysis." In Proceedings of the 2007 IEEE International Symposium on Workload Characterization, pp.204-213, Boston, MA, September, 2007.
[pdf] [slide] |
| FPL-07 | Taeweon Suh, Shih-Lien L. Lu and Hsien-Hsin S. Lee. "An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In Proceedings of the 17th International Conference on Field Programmable Logic and Applications, Amsterdam, Netherlands, August, 2007. (Nominated for the Best Paper Award.)
[pdf] [slide] |
| CF-07 | Weidong Shi and Hsien-Hsin S. Lee. "Accelerating Memory Decryption and Authentication with Frequent Value Prediction." In Proceedings of the ACM International Conference on Computing Frontiers, pp.35-46, Ischia, Italy, May, 2007.
[pdf] [slide] |
| ASP-DAC | Fayez Mohamood, Michael Healy, Sung Kyu Lim, and Hsien-Hsin S. Lee. "Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling." In Proceedings of the 12th Asia and South Pacific Design Automation Conference, pp.786-791, Yokohama, Japan, January, 2007.
[pdf] [slide] |
| IEEE TCAD | Michael Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, and Gabriel H. Loh. "Multi-Objective Microarchitectural Floorplanning For 2D and 3D ICs." In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 26, No. 1, pp.38-52, 2007.
[pdf] |
| IEEE TC | Xiaotong Zhuang and Hsien-Hsin S. Lee. "Reducing Cache Pollution via Dynamic Data Prefetch Filtering." In IEEE Transactions on Computers, Vol. 56, No.1, pp.18-31, January, 2007.
[pdf] |
2006
|
| MICRO-39 | Fayez Mohamood, Michael Healy, Sung Kyu Lim, and Hsien-Hsin S. Lee. "A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design." In Proceedings of the ACM/IEEE International Symposium on Microarchitecture, pp.3-14, Orlando, Florida, December, 2006.
[pdf] [slide] |
| MICRO-39 | Weidong Shi and Hsien-Hsin S. Lee. "Authentication Control Point and its Implications for Secure Processor Design." In Proceedings of the ACM/IEEE International Symposium on Microarchitecture, pp.103-112, Orlando, Florida, December, 2006.
[pdf] [slide] |
| IBM PAC2 | Mrinmoy Ghosh and Hsien-Hsin S. Lee. "DRAMdecay: Using Decay Counters to Reduce Energy Consumption in DRAMs." In Proceedings of the 3rd Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=AC2), Yorktown Heights, NY, October, 2006.
[pdf] |
| IISWC-06 | Richard M. Yoo, Han Lee, Kingsum Chow and Hsien-Hsin S. Lee. "Constructing a Non-Linear Model with Neural Networks For Workload Characterization." In Proceedings of the 2006 IEEE International Symposium on Workload Characterization, pp.150-159, San Jose, California, October, 2006.
[pdf] [slide] |
| CASES-06 | Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stuart Biles, and Hsien-Hsin S. Lee. "Reducing Energy of Virtual Cache Synonym Lookup using Bloom Filters." In Proceedings of the ACM/IEEE International Conference on Compilers Architecture and Synthesis for Embedded Systems, pp.179-189, Seoul, Korea, October, 2006.
[pdf] [slide] |
| CASES-06 | Chinnakrishnan Ballapuram, Kiran Puttaswamy, Gabriel H. Loh, and Hsien-Hsin S. Lee. "Entropy-based Low Power Data TLB Design." In Proceedings of the ACM/IEEE International Conference on Compilers Architecture and Synthesis for Embedded Systems, pp.304-311, Seoul, Korea, October, 2006.
[pdf] [slide] |
| JPDC | Chenghuai Lu, Tao Zhang, Weidong Shi, and Hsien-Hsin S. Lee. "M-TREE: A High Efficiency Security Architecture for Protecting Integrity and Privacy of Software." In the Journal of Parallel and Distributed Computing for a special issue on Security in Grid and Distributed Systems, Vol. 66, issue 9, pp.1116-1128, 2006.
[pdf] |
| GH-06 | Weidong Shi, Hsien-Hsin S. Lee, Richard M. Yoo, and Alexandra Boldyreva. "A Digital Rights Enabled Graphics Processing System." In Proceedings of the ACM SIGGRAPH/Eurographics Workshop of Graphics Hardware, pp.17-26, Vienna, Austria, September, 2006.
[pdf] [slide] |
| PACT-15 | Lan Gao, Jun Yang, Marek Chrobak, Youtao Zhang, San Nguyen, and Hsien-Hsin S. Lee. "A Low-cost Memory Remapping Scheme for Address Bus Protection." In Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniuqes, pp.74-83, Seattle, WA, September, 2006.
[pdf] [slide] |
| Transactions on HiPEAC | Weidong Shi, Chenghuai Lu, and Hsien-Hsin S. Lee. "Memory-centric Security Architecture." In Transactions on High-Performance Embedded Architectures and Compilers, Vol. 1, pp.95-115, 2007. |
| IEEE TCAD | Mongkol Ekpanyapong, Jacob Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Profile-Guided Microarchitectural Floorplanning for Deep Submicron Processor Design." In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 25, No.7, pp.1289-1300, July, 2006.
[pdf] |
| ISCA-33 | Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, and Mrinmoy Ghosh. "An Integrated Framework for Dependable and Revivable Architecture Using Multicore Processors." In Proceedings of the 33rd International Symposium on Computer Architecture, pp. 102-113, Boston, MA, June, 2006.
[pdf] [slide] |
| ARCS-06 | Mrinmoy Ghosh, Emre Özer, Stuart Biles, and Hsien-Hsin S. Lee. "Efficient System-on-Chip Energy Management with a Segmented Bloom Filter." In Proceedings of the 19th International Conference on Architecture of Computing Systems, pp. 283-297,Frankfurt/Main, Germany, March, 2006.
[pdf] [slide] |
| DATE-06 | Michael Healy, Mario Vittes, Mongkol Ekpanyapong, Chinnakrishnan Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee, and Gabriel H. Loh. "Microarchitectural Floorplanning Under Performance and Temperature Tradeoff." In Proceedings of the Design, Automation and Test in Europe, pp.1288-1293, Munich, Germany, March, 2006.
[pdf] [slide] |
| HPCA-12 | Weidong Shi, Joshua B. Fryman, Guofei Gu, Hsien-Hsin S. Lee, Youtao Zhang, and Jun Yang. "InfoShield: A Security Architecture for Protecting Information Usage in Memory." In Proceedings of the 12th International Symposium on High-Performance Computer Architecture, pp.225-234, Austin, TX, February, 2006.
[pdf] [slide] |
2005
|
| HiPEAC | Weidong Shi, Chenghuai Lu, and Hsien-Hsin S. Lee. "Memory-centric Security Architecture." In Proceedings of the 2005 International Conference on High Performance Embedded Architectures and Compilers, pp.153-168, Barcelona, Spain, November, 2005.
[pdf] [slide] |
| IBM PAC2 | Fayez Mohamood, Mrinmoy Ghosh, and Hsien-Hsin S. Lee. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." In Proceedings of the 2nd Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=AC2), pp.143-152, Yorktown Heights, NY, September, 2005. (Best Paper Selected by TPC)
[slide] |
| ISLPED | Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, and Milos Prvulovic. "Synonymous Address Compaction for Energy Reduction in Data TLB." In Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED-05), pp. 357-362, San Diego, California, August, 2005.
[pdf] [slide] |
| DAC-42 | Taeweon Suh, Daehyun Kim, and Hsien-Hsin S. Lee. "Cache Coherence Support for Non-Shared Bus Architecture on Heterogeneous MP SoCs." In Proceedings of the 42nd Design Automation Conference (DAC-42), pp.553-558, Anaheim, California, June, 2005.
[pdf] [slide] |
| ISCA-32 | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, Chenghuai Lu, and Alexandra Boldyreva. "High Efficiency Counter Mode Security Architecture via Prediction and Precomputation." In the Proceedings of the 32nd International Symposium on Computer Architecture, pp.14-24, Madison, Wisconsin, June, 2005.
[pdf] [slide] |
| ICAC | Weidong Shi, Hsien-Hsin S. Lee, Guofei Gu, Mrinmoy Ghosh, Laura Falk, and Trevor N. Mudge. "Intrusion Tolerant and Self-Recoverable Network Service System Using Security Enhanced Chip Multiprocessors." In the Proceedings of the 2nd International Conference on Autonomic Computing, pp.263-273, Seattle, Washington, June, 2005.
[pdf] [slide] |
| CF | Martin Schulz, Brian S. White, Sally A. McKee, Hsien-Hsin S. Lee, and Jurgen Jeitner. "Owl: Next Generation System Monitoring." In Proceedings of the ACM Computing Frontiers 2005, pp.116-124, Ischia, Italy, May, 2005.
[pdf] |
| ISCAS | Mongkol Ekpanyapong, Sung Kyu Lim, Chinnakrishnan Ballapuram, and Hsien-Hsin S. Lee. "Wire-driven Microarchitectural Design Space Exploration." In the Proceedings of the 2005 IEEE International Symposium on Circuits and Systems, pp.1867-1870, Kobe, Japan, May, 2005.
[pdf] [slide] |
| CAN | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, and Mrinmoy Ghosh. "Towards the Issues in Architectural Support for Protection of Software Execution." In ACM SIGARCH Computer Architecture News, Vol. 33, Issue 1, pp.6-15, March, 2005.
[pdf] |
2004
|
| IEEE MICRO | Taeweon Suh, Hsien-Hsin S. Lee, and Douglas M. Blough. "Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2." In IEEE MICRO , pp.70-78, September/October, 2004.
[pdf] |
| DRM | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, and Tao Zhang. "Attacks and Risk Analysis for Hardware Supported Software Copy Protection Systems." In Proceedings of the 4th ACM Workshop on Digital Rights Management, pp. 54- 62, Washington D.C., October, 2004.
[pdf] |
| PACT-13 | Weidong Shi, Hsien-Hsin S. Lee, Mrinmoy Ghosh, and Chenghuai Lu. "Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems." In Proceedings of the International Conference on Parallel Architecture and Compilation Techniques, pp.123-134, Antibes Juan-les-Pins, France, September, 2004.
[pdf] [slide] |
| CASES | Xiaotong Zhuang, Tao Zhang, Hsien-Hsin S. Lee, and Santosh Pande. "Hardware Assisted Control Flow Obfuscation for Embedded Processors." In Proceedings of the International Conference on Compilers Architecture Synthesis for Embedded Systems, pp.292-302, Washington D.C., September, 2004. (Best Paper Awarded)
[pdf] [slide] |
| SOCC | Mrinmoy Ghosh, Weidong Shi, and Hsien-Hsin S. Lee. "CoolPression - A Hybrid Significance Compression Technique for Reducing Energy in Caches." In Proceedings of the IEEE International System-On-Chip Conference, pp. 399-402, Santa Clara, California, September, 2004.
[pdf] [slide] |
| ACSAC | Mongkol Ekpanyapong, Pinar Korkmaz, and Hsien-Hsin S. Lee. "Choice Predictor for Free." In Proceedings of the 9th Asia-Pacific Computer Systems Architecture Conference, pp. 399-413, Beijing, China, September, 2004.
[pdf] [slide] |
| IEEE MICRO | Taeweon Suh, Hsien-Hsin S. Lee, and Douglas M. Blough. "Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1." In IEEE MICRO special issue on Embedded Systems: Architecture, Design and Tools. pp.33-41, July/August, 2004.
[pdf] |
| DAC-41 | Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watewai, Hsien-Hsin S. Lee, and Sung Kyu Lim. "Profile-Guided Microarchitectural Floorplanning for Deep Submicron Processor Design." In Proceedings of the 41st Design Automation Conference, pp. 634-639, San Diego, California, June, 2004.
[pdf] [slide] |
| DATE | Taeweon Suh, Douglas M. Blough, and Hsien-Hsin S. Lee. "Supporting Cache Coherence in Heterogeneous Multiprocessor Systems." In Proceedings of the Design Automation and Test in Europe Conference, pp.1150-1155, Paris, France, February, 2004.
[pdf] [slide] |
2003
|
| ICCAD | Yuvraj S. Dhillon, Abdulkadir U. Diril, Abhijit Chatterjee, and Hsien-Hsin S. Lee. "Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level." In Digest of Technical Papers of the International Conference on Computer-Aided Design, pp.693-700, San Jose, California, November, 2003.
[pdf] [slide] |
| ICPP | Xiaotong Zhuang and Hsien-Hsin S. Lee. "A Hardware Based Cache Pollution Filtering Mechanism for Aggressive Prefetches." In Proceedings of the 2003 International Symposium on Parallel Processing, pp.286-293, Kaohsiung, Taiwan, October, 2003.
[pdf] [slide] |
| IEEE MICRO | Joshua B. Fryman, Chad M. Huneycutt, Hsien-Hsin S. Lee, Kenneth M. Mackenzie, and David E. Schimmel. "Energy Efficient Network Memory for Ubiquitous Devices." In IEEE MICRO special issue on Power Complexity Aware Design. pp.60-70, September/October, 2003.
[pdf] |
| ISLPED | Hsien-Hsin S. Lee and Chinnakrishnan S. Ballapuram. "Energy Efficient D-TLB and Data Cache using Semantic-Aware Multilateral Partitioning." In Proceedings of the International Symposium on Low Power Electronics and Design, pp. 306-311, Seoul, Korea, August, 2003.
[pdf] [slide] |
| CGO | Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, and Hsien-Hsin S. Lee. "Predicate-aware Scheduling: A Technique for Reducing Resource Constraints." In Proceedings of the Annual IEEE/ACM International Symposium on Code Generation and Optimization, pp.169-178, San Francisco, California, 2003.
[pdf] [slide] |
2001
|
| JILP | Hsien-Hsin S. Lee, Gary S. Tyson, and Matthew K. Farrens. "Improving Bandwidth Utilization using Eager Writebacks." In Journal of Instruction-Level Parallelism, Vol. 3, 2001.
[pdf] |
| HPCA | Hsien-Hsin S. Lee, Mikhail Smelyanskiy, Chris J. Newburn, and Gary S. Tyson. "Stack Value File: Custom Microarchitecture for the Stack." In Proceedings of the 7th IEEE International Symposium on High Performance Computer Architecture, pp.5-14, Monterrey, Mexico, January, 2001.
[pdf] [slide] |
2000
|
| MICRO | Hsien-Hsin S. Lee, Gary S. Tyson, and Matthew K. Farrens. "Eager Writeback - a Technique for Improving Bandwidth Utilization." In Proceedings of the 33rd ACM/IEEE International Symposium on Microarchitecture, pp.11-21, Monterey, California, December, 2000. (Best Paper Awarded)
[pdf] [slide] |
| CASES | Hsien-Hsin S. Lee and Gary S. Tyson. "Region-based Caching: an Energy Efficient Memory Architecture for Embedded Processors." In Proceedings of the International Conference on Compilers Architecture and Synthesis for Embedded Systems, pp.120-127, San Jose, California, November, 2000.
[pdf] |
| ISPASS | Hsien-Hsin Lee, Youfeng Wu, and Gary Tyson. "Quantifying Instruction-Level Parallelism Limits on an EPIC Architecture." In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, pp.21-27, Austin, Texas, April, 2000.
[pdf] |
1999
|
| ITJ | Paul Zagacki, Deep Buch, Emile Hsieh, Daniel Melaku, Vladimir Pentkovski, and Hsien-Hsin Lee. "Architecture of a 3D Software Stack for Peak Pentium III Processor Performance." In Intel Technology Journal, Q2, May, 1999.
[pdf] |
1994
|
| ICPP | Eric Boyd, Waqar Azeem, Hsien-Hsin Lee, Tien-Pao Shih, Shih-Hao Hung, and Edward Davidson. "A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1." In Proceedings of the 1994 International Conference on Parallel Processing, pp.188-192, St. Charles, Illinois, August, 1994.
[pdf] |
|
Refereed Workshop Papers
|
2008
|
| PESPMA08 | Richard M. Yoo and Hsien-Hsin S. Lee. "Helper Transactions: Enabling Thread-Level Speculation via A Transactional Memory System." In Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures in conjuction with ACM/IEEE International Symposium on Computer Architecture (ISCA-35), Beijing, China, June, 2008.
[pdf] [slide] |
| MMCS08 | Hrishikesh Amur, Ripal Nathuji, Mrinmoy Ghosh, Karsten Schwan, and Hsien-Hsin S. Lee. "IdlePower: Application-Aware Management of processor Idle States." In Workshop on Managed Many-Core Systems co-located with ACM/IEEE International Symposium on High Performance Distributed Computing, Boston, MA, June, 2008 .
[pdf] |
| WACI-VI | Eric Fontaine, and Hsien-Hsin S. Lee. "Bicephaly: Maximizing Bandwidth by Duplexing Power and Data." In Workshop on Wild and Crazy Ideas in conjunction with International Conference on Architectural Support for Programming Languages and Operating Systems, Seattle, WA, February, 2008.
[pdf] |
2007
|
| HPEC-07 | Dong Hyuk Woo, Joshua B. Fryman, Allan D. Knies, Marsha Eng, and Hsien-Hsin S. Lee. "POD: A Parallel-On-Die Architecture." In the 11th Annual Workshop on High Performance Embedded Computing, Lexington, Massachusetts, September, 2007. (One of four finalists for Best Paper Award.)
[pdf] [slide] |
| CMPMSI | Dong Hyuk Woo and Hsien-Hsin S. Lee. "Analyzing Performance Vulnerability due to Resource Denial-of-Service Attack on Chip Multiprocessors." In Workshop on Chip Multiprocessor Memory Systems and Interconnects in conjunction with the 13th International Conference on High-Performance Computer Architecture, Phoenix, Arizona, February, 2007.
[pdf] [slide] |
| ESNS07 | Hsien-Hsin S. Lee and Santosh Pande. "Secure Processing On-Chip." In Army Research Office Planning Workshop on Embedded Systems and Network Security, Raleigh, North Carolina, February, 2007.
[pdf] [slide] |
2006
|
| WARFP | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Initial Observations of Hardware/Software Co-Simulation using FPGA in Architecture Research." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, Austin, Texas, February, 2006.
[pdf] [slide] |
2005
|
| Perf. Monitor Design | Martin Schulz, Brian White, Sally A. McKee, and Hsien-Hsin Lee. "A Vision for Next Generation System Monitoring." In Workshop on Hardware Performance Monitor Design and Functionality in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[slide] |
| WARFP | Taeweon Suh, Hsien-Hsin S. Lee, Sally A. McKee, and Martin Schulz. "Evaluating System-wide Monitoring Capsule Design Using Xilinx Virtex-II Pro FPGA." In Workshop on Architecture Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] [slide] |
| WARFP | Christopher R. Clark, Ripal Nathuji, and Hsien-Hsin S. Lee. "Using an FPGA as a Prototyping Platform for Multi-core Processor Applications." In Workshop on Architectural Research using FPGA Platforms in conjunction with International Symposium on High-Performance Computer Architecture, San Francisco, CA, February, 2005.
[pdf] |
2004
|
| WASSA | Weidong Shi, Hsien-Hsin S. Lee, Chenghuai Lu, and Mrinmoy Ghosh. "Towards the Issues in Architectural Support for Protection of Software Execution." In the Workshop on Architectural Support for Security and Anti-Virus in conjunction with the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, pp.1-10, Boston, MA, October, 2004.
[pdf] [slide] |
2003
|
| WCED | Hsien-Hsin S. Lee, Joshua B. Fryman, A. Utku Diril, and Yuvraj S. Dhillon. "The Elusive Metric for Low-Power Architecture Research." In the Workshop on Complexity-Effective Design in conjunction with the 30th International Symposium on Computer Architecture, San Diego, California, June, 2003.
[pdf] [slide] |
|
Refereed Poster Presentations
|
2007
|
| FPGA07 | Taeweon Suh, Hsien-Hsin S. Lee, Shih-Lien Lu, and John Shen. "Coherence Traffic Considered Harmful - An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems." In the 15th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Monterey, CA, February, 2007. |
2006
|
| SIGDA Ph.D. forum | Taeweon Suh and Hsien-Hsin S. Lee. "Integration of Cache Coherence Protocols for MPSoCs and Coherence Traffic Evaluation using FPGA." In the 9th SIGDA Ph.D. forum in conjunction with the 43rd Design Automation Conference, San Francisco, CA, July, 2006. |
|
Theses
|
Ph.D.
|
| Chinnakrishnan S. Ballapuram. "Semantics-Oriented Low Power Architecture." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
[pdf] |
| Taeweon Suh. "Integration and Evaluation of Cache Coherence Protocols for Multiprocessor SoCs." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2006.
[pdf] |
| Weidong Shi. "Architectural Support for Protecting Memory Integrity and Confidentiality." College of Computing, Georgia Institute of Technology, 2006.
[pdf] |
| Joshua Bruce Fryman. "SoftCache Architecture." College of Computing, Georgia Institute of Technology, 2005.
[pdf] |
M.S.
|
| Richard M. Yoo. "Adaptive Transaction Scheduling for Transactional Memory Systems." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2008.
[pdf] |
| Fayez Mohamood. "DLL-Conscious Instruction Fetch Optimization for SMT Processors." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2006.
[pdf] |
| Prateek Tandon. "High-Performance Advanced encryption Standard (AES) Security Co-Processor Design." School of Electrical and Computer Engineering, Georgia Institute of Technology, 2003.
[pdf] |
|
|
|
|
|
|
266 Ferst Drive, KACB 2313
Atlanta, GA 30332-0765
|
You are visitor # .
|
http://arch.ece.gatech.edu
404-385-6273
|
|
|
|
|
|
